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Job Code | #10159

Senior Analog Layout Designer


Aliso Viejo, CA, USA, Dresden Germany or Edinburgh, Scotland

Job Overview:

Do you enjoy working in a creative fast-growing entrepreneurial environment? With indie you´ll never walk alone! We place high value on our teams and pursue excellence for our employees and customers!

indie is an Autotech solutions innovator. We focus on edge sensors spanning multiple modalities including LiDAR, radar, ultrasound and vision for Advanced Driver Assistance Systems (ADAS), autonomous vehicles, connected car, user experience and electrification applications.

We develop custom and standard SoC solutions for automotive applications which integrate advanced digital ICs with mixed-signal devices into a single System-in-Package (SiP). The mixed signal components can include power management, RF, high voltage as well as high speed convertors, allowing us to provide complete solutions to our international customer base.

The Analog Layout Engineer is a technical staff member responsible for managing and executing all activities associated with analog layout. Given the wide spectrum of applications, the layout engineer must be comfortable with various techniques applied to RF, Power and sensing circuits.

Job Responsibilities:

  • Work closely with analog front-end designers to create layouts that meet performance and cost targets.

  • Take a leading role in using best layout practices. This includes understanding device matching, interconnect coupling, substrate coupling, latchup, ESD, edge effects, proximity effects, electromigration, and high voltage effects.

  • Propose good tradeoffs regarding layout area, performance, reliability, yield.

  • Manage activities such as floorplanning, power mesh implementation, signal shielding and associated checks (LVS, DRC, ERC, ANT, FLOAT, etc.).

  • Make all checks and necessary documentation for chip tape out / pattern generation.

  • Help improve the design quality, flow, processes for first time design success and high yield manufacturability (DFM).

  • Train junior designers to improve layout techniques.

Job Requirements:

With us, you must love being part of an organization where everyone makes a difference and contributes to the company's success. Creativity, Ownership and Excellence are what we value.

These are the skills and know how an ideal candidate would bring. We understand that nobody is perfect! After all, your new job should challenge you and you should have the possibilities to grow.

  • At least 3 years of custom layout experience.

  • Experience with very high-speed (GHz), transistor-level CMOS layout.

  • Knowledge of ADC, DAC, PLL, or SERDES designs is a plus.

  • Familiarity with deep sub-micron processes, preferably FinFET.

  • Good working knowledge of Cadence design environment.

  • Familiarity with Linux/Unix operating environment, shell commands, etc.

  • Excellent communication skills.


Human Resource Department

Telephone: 949-608-0854

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