Location:
Job Location
Job Overview:
Do you enjoy working in a creative fast-growing entrepreneurial environment? With indie you´ll never walk alone! We place high value on our teams and pursue excellence for our employees and customers!
indie Semiconductor is a fabless semiconductor company specializing in the design of innovative mixed-signal System-on-Chip (SoC) solutions for automotive applications.
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Job Responsibilities:
Job Code | #105
(Principal/Senior) Digital IC Design Verification Staff Engineer
Location:
Aliso Viejo (CA, USA) or Dresden (Germany)
Job Overview:
Do you enjoy working in a creative fast-growing entrepreneurial environment? With indie you´ll never walk alone! We place high value on our teams and pursue excellence for our employees and customers!
indie is an Autotech solutions innovator. We focus on edge sensors spanning multiple modalities including LiDAR, radar, ultrasound and vision for Advanced Driver Assistance Systems (ADAS), autonomous vehicles, connected car, user experience and electrification applications.
Our design team develops custom and standard SoC solutions for automotive applications which integrate advanced digital ICs (Arm®Cortex® MCUs and/or DSP) with mixed-signal devices into a single System-in-Package (SiP). The mixed signal can include power management, RF, high voltage as well as high speed convertors allowing us to provide complete solutions to our international customer base.
You will be responsible for managing and executing all activities associated with design, integration, verification and maintenance of digital IPs integrated in IC used in the area of embedded microcontroller-based system solutions. The IC design responsibilities will include building digital components based on customer application specific requirements or IP standards and support the team to complete the design including top level integration, physical design support (constraints and gate level verification). Finally, you must be able to validate and debug the IP on silicon.
Job Responsibilities:
Develop verification and coverage plan based on the design micro-architecture document
Execute verification plan, including design bring-up, DV environment bring-up, regression enabling for all assigned features
Create test bench components (tests, sequences, agents) from scratch
Run regressions, debug test failures, track functional and code coverage metrics
Work closely with design team to report and resolve bugs prior to tape-out
Job Requirements:
With us, you must love being part of an organization where everyone makes a difference and contributes to the company's success. Creativity, Ownership and Excellence are what we value.
These are the skills and know how an ideal candidate would bring. We understand that nobody is perfect! After all, your new job should challenge you and you should have the possibilities to grow.
B.S. in Electrical Engineering +3 or more years experience or
Master’s degree +1 or more years of experience
Strong fundamental understanding of object-oriented programming and constrained random verification concepts
Good understanding of digital design concepts and System Verilog HDL
Knowledge of verification methodologies such as UVM or eRM
Experience in using Cadence Incisiv or Mentor Questa tool suite for verification is a plus
Good problem solving and debugging capabilities
Knowledge of communication protocols such as USB is a plus
Understanding of micro-processor bus fabric protocols such as AHB, APB, AXI is preferred
Experience working with revision control systems such as subversion, CVS
Experience writing scripts in languages such as Perl, Ruby, Python, or TCL
Familiarity with bug tracking tools such as JIRA is a plus
Team player with excellent oral and written communication skills