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Digital Physical Design Senior Staff Engineer

Job Overview:

Do you enjoy working in a creative fast-growing entrepreneurial environment? With indie you´ll never walk alone! We value our team high and pursue excellence for our employees and customers!

Indie Semiconductor is a fabless semiconductor company specializing in the design of innovative mixed-signal System-on-Chip (SoC) solutions for automotive applications.

Our design team develops custom and standard SoC solutions for automotive applications which integrate advanced digital ICs (Arm®Cortex® MCUs and/or DSP) with mixed-signal devices into a single System-in-Package (SiP). The mixed signal can include power management, RF, high voltage as well as high speed convertors allowing us to provide complete solutions to our international customer base.

You will cover design topics such as pure digital advanced microcontrollers and DSP as well as complex mixed signal systems that includes power management, high speed design, sensor front end and GHz radios. Indie Semiconductor is looking at hiring a dedicated team member for Full Chip and Block Level Place and Route, the responsibilities in this role involves leading the whole digital Physical design flow from RTL to GDS, optimizing and resolving multi-mode timing constraints and developing a strategy to draw power mesh with optimum floorplan.

 

You will also run power optimization, IR drop analysis, multi-corner (MMMC) clock tree synthesis along with signal integrity, cross talk analysis as required by the project and technology of choice. Obviously, ECO management are also needed along with capabilities to develop generic reusable scripts to optimize specific design tasks. Having formal equivalence check knowledge would be a plus.

Job Responsibilities:

  • Ownership of the entire Physical Design (PD) flow at block and chip level.

  • Technology ranging from 0.35um to 28nm Mixed Signal including RF design and advanced power management flow (UPF/CPF).

  • Lead the entire PD flow including synthesis, floor planning, P&R, STA, IR and EM checks, physical and power verification, including DRC and LVS.

  • Leadership in flow generation, work closely with digital, DFT and analog design teams.

  • Report to chip lead on a project basis and senior management for daily work allocation.

Qualifications:

With us you must love working within a small entity where everyone makes a difference to the company success. Creativity, Ownership and Excellence we value high.

These are the skills and know how an ideal candidate would bring. We understand that nobody is perfect! After all, your new job should challenge you and you should have the possibilities to grow.

  • Bachelors / Masters in a relevant field.

  • 5+ years of experience in physical design.

  • MS degree in Electrical and/or Computer Engineering.

  • Working knowledge of Cadence place & route and Static Timing Analyzers.

  • Good understanding of timing requirements, clock tree generation and DFT insertion techniques.

  • Physical verification (DRC/LVS) is a plus.

  • Support Post layout simulations and Timing Analysis.

  • Power / IR drop analysis - advantage.

  • Great communication skills.

Work Location: Aliso Viejo (California) USA, Austin (Texas) USA

HR Contact:

Human Resource Department

career_notifications@indiesemi.com

Telephone: 949-608-0854

CONTACT INDIE

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Tel: +1 949-608-0854

Email: info@indiesemi.com

32 Journey

Aliso Viejo, CA 92656

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